Thesis Topic - Digital Class D Modulator Implementation


Class D amplifiers are widely used in audio systems due to their high efficiency and low power dissipation. Recently, Gallium Nitride (GaN) transistors have emerged as a promising candidate for high-power, high-frequency switching applications, due to their low on-resistance and fast switching speed.

The objective of this thesis is to design and implement a digital Class D modulator driving GaN transistors in an FPGA, using hardware description languages (HDL) and digital signal processing (DSP) techniques. The proposed system will be optimized for high efficiency and low distortion, and the performance metrics will be evaluated in terms of power output, frequency response, and Total Harmonic Distortion (THD).

The system will be tested using a prototype Class D amplifier circuit, driving a set of speakers. The results of this thesis will demonstrate the feasibility and effectiveness of using a digital Class D modulator driving GaN transistors in an FPGA, and provide insights into the optimization and enhancement of the proposed system. This research will contribute to the development of high-performance, low-power, and high-fidelity audio amplifiers for various consumer, professional, and automotive applications.

As we have a digital flow at MinDCet, the possibility exists to generate a real IC layout of the implemented HDL, to assess the impact of the design complexity on silicon area.

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